Product Description
In high-speed designs, signal quality is crucial to design performance. This workshop will teach you how to analyze the impedance, coupling, and references in the design to improve signal integrity. This workshop will also teach you how to analyze skew for DDR and verify devices meet the required specifications in Sigrity.
- Use the ERC – Trace Imp/Cpl/Ref Check workflow
- Configure net groups
- Setup a simulation for impedance, coupling, and reference checks
- Analyze results for impedance, coupling, and reference checks
- Analyze results for nets and net groups
- Configure net groups for DDR
- Set rules and analyze violations for impedance and DDR skew
- Export results and create reports