Modern electronics could not exist without semiconductors and digital electronics but as electronics become faster and more complex, it’s essential to model realistic behavior to ensure design accuracy. At high speeds, digital electronics are susceptible to issues with propagation delay, and any stray capacitance present on the board could lead to attenuation, which could prevent a high input from ever reaching the device’s threshold voltage. PSpice allows you to quickly create a custom D latch SPICE model for accurate simulation of digital designs with a wizard-based approach.
This quick how-to will provide step-by-step instructions on how to create a create a D latch SPICE model in PSpice using the PSpice Modeling Application.
To follow along, download the materials provided above the table of contents.
How-To Video
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Create a D Latch SPICE Model
Step 1: Open the provided design in PSpice 23.1.
Note: A wizard-based approach to digital models is new in version 23.1. See other new features here.
Step 2: Select Place > PSpice Part > Modeling Application from the menu.
Step 3: In the Modeling Application, expand Digital > Latches.
Step 4: Select D – Set/Reset. This model contains PRESET and CLEAR pins, which can be used to set and override the output of the latch.
Step 5: The D Latch options window opens. Enter the following model parameters:
- Initial Condition: 0
- Propagation Delay: 13n
- Threshold: 2.5
- Hysteresis Width: 2
- Output Resistance: 1m
- Input Resistance: 10G
Note: The logic device being modeled has negligible output resistance and requires negligible input current. Learn how to identify these parameters from device datasheets to create a realistic representation of D latches here.
Step 6: Click Place.
Step 7: Click to place the latch in the schematic.
Step 8: Select the Voltage/Level Marker button from the toolbar.
Step 9: Click to place probes on the CLK, DATA, and DATA_OUT nets. Right-click and select End Mode when finished.
Running the Simulation
Step 10: Select PSpice > Run from the menu.
Step 11: View the simulation results. The output follows the D input when CLK is high.
Modifying the D Latch SPICE Model
Step 12: Double-click the OFFTIME parameter of stimulus DSTM1.
Step 13: Enter 1u into the Display Properties window and click OK.
Step 14: Double-click the ONTIME parameter of stimulus DSTM1. Enter 1u for the value and click OK.
Step 15: Select PSpice > Run from the menu.
Step 16: View the results. The output now consists of three short pulses at each clock cycle.
Wrap Up & Next Steps
Quickly create a D Latch SPICE model and simulate accurate digital circuit behavior with the Modeling Application in PSpice. Upgrade to the latest 23.1 release or test out this feature and more with a free trial of OrCAD X.
