Part one of our 4-part, webinar-based series “Root Cause Analysis for General Reliability Issues in Electronics Assembly” focused on the difference between quality and reliability. Within the post,we explained how according to Dr. Ramkumar, the webinar’s presenter, you cannot have reliability without quality and vice versa. Also discussed were ways to help guarantee the components you create are meeting quality and reliability standards. Part two of this series will focus on failure modes and mechanisms.
When we talk about failure mechanisms, we are referring to the physical, chemical, or other processes that lead to device failure. Failure mode however, is the manner in which failure is observed (for example: electrical shorting, opens, etc.). Knowing these two definitions, the conclusion can be made that failure mechanism leads to failure mode.
Dr. Ramkumar discusses how identifying the cause of the failure (failure analysis) starts with the failure itself, then moves onto the analysis of the mode of failure. Once the mode of failure is identified, one needs to narrow down to the failure mechanism—did we drop the board, was the enclosure designed incorrectly, etc.—this will help you to determine the root cause.
There are two common issues when it comes to mechanism failures: an overstress mechanism or a wear out mechanism. In regards to overstress mechanism, they can be caused by mechanical overstress or electrical overstress. Common examples of mechanical overstress are delamination or plastic deformation, while common examples of electrical overstress include ESD, electromigration, gate oxide breakdown, radiation, etc. Wear out mechanisms can be either mechanical, electrical, or chemical. Fatigue, creep, voiding, and delamination are all prime examples of mechanical wear outs. Electrical wearouts include hillock, junction spiking, electromigration, etc. while chemical wear outs include corrosion and diffusion.(see img.1)
The most common product field failure causes are linked to electrical overstress or electrostatic discharge. According to Dr. Ramkumar, oftentimes ESD damage is often indistinguishable from electrical overstress. He continues on to explain how ESD is often difficult to identify and failure analysis is expensive and time consuming, requiring sophisticated equipment. Knowing this, it is important to make sure you have a plan to identify potential failure mechanisms during the design phase where the cost of change is the lowest. For the electrical portion of your design PSpice provides a powerful simulation environment to identify and fix reliability issues, like electrical overstress, before you go to production. This will help you to save time and money in the long run as well as, ensuring you are delivering a reliable product to customers. Tata Motors is a recent example of how companies are using PSpice to identify and resolve reliability issues early in the design process.
