The following article was originally posted by DeepChip.
ANIRUDH'S ATTACK: A year ago -- while everyone else missed it -- I *scooped*
how Anirudh announcing his Clarity 3D solver at CDNlive'19 was actually a
direct frontal attack against Ajei Gopal's Ansys HFSS.
SCOOP! -- Anirudh goes total war on Ansys mothership at CDNlive'19!
http://www.deepchip.com/items/0586-05.html
At the time, Anirudh made bold claims of 5-10X(??) speed up over HFSS and
alleged much greater memory capacity that weren't substatiated at all. In
fact, at first most users were very skeptical:
56% of users doubt Anirudh's secret "new" Clarity matrix solver
http://www.deepchip.com/items/0588-05.html
Lots of doubt there... but that all changed when the first Clarity vs. HFSS
user benchmark came out with:
Clarity vs. HFSS benchmark; "It's results, NOT algorithms, dummy!"
http://www.deepchip.com/items/0588-06.html
And that was 6 months ago on 10/01/2019.
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CLARITY VS. HFSS WINS PILING UP: And now, in this report, we have EIGHT users
validating that Clarity is real -- SIX of them with direct data against HFSS.
These 9 (total) benchmarks now prove out the Clarity speedup with the same
accuracy claims, along with its smaller memory footprint claim.
1. Clarity vs. HFSS Speed-Up
"We ran Clarity on up to 24 CPU's -- it was generally 7x faster
than Ansys HFSS."
"Cadence Clarity had up to a 15X faster turnaround time versus
Ansys HFSS ..."
2. Clarity vs. HFSS Accuracy
"The accuracy difference between Clarity and HFSS was negligible;
no more than 0.5 dB for the full frequency band."
3. Clarity vs. HFSS Memory Footprint
"Clarity's memory footprint was only 15 GB. HFSS's footprint
was 116 GB -- nearly 8X bigger."
MORE CAPACITY == MORE ACCURACY: Users were also excited about the extra
capacity Clarity has vs. HFSS -- not just cause they could run more -- it's
because they could now run the entire design getting more accuracy.
"The largest block we ran on both tools was an 80 mm x 100 mm PCB,
with 22 layers and 44 excitations. ... We've always had accuracy
concerns with the "cutting" method needed by HFSS to improve runtime.
Clarity's higher capacity resolves this."
"We can now put our entire design into Clarity for analysis vs. breaking
it up. When we break it up for HFSS, we have to make approximations
and sacrifice some accuracy. Not with Clarity."
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AJEI CAN'T IGNORE THIS NOW: My orginal analysis that I said when I first
broke this Clarity news still stands.
"Depending on who you talk to, the TAM in EM simulation is $300M to
$350M, with HFSS owning 90% (or more) of the 3-D EM FEM sub niche.
This new attack by Anirudh is seriously bad news for Ajei Gopal --
because Ajei is stuck in a defensive war ..."
"On the other side, this is all empty open green fields for Anirudh
to grow CDNS in. In the first 12 months he can take $10M away
from HFSS, or $20M, or $30M, or ... it's all pure growth for him."
- from http://www.deepchip.com/items/0586-05.html
But, being a loooooong time EDA watcher, I cautioned back then:
"The only limit is how aggressive Anirudh's R&D guys are in making
Clarity better than HFSS; and how aggressive his marketing is in
countering the FUD; and and how aggressive his sales guys are
in reaching the very entrenched Ansys HFSS customer base.
They could go Innovus (DAC'18 #4b) and kick ass.
Or they could go Pegasus (ESNUG 585 #1) and fall down.
We'll see."
- from http://www.deepchip.com/items/0586-05.html
And right now, with 7 total Clarity vs. HFSS user benchmarks out there, it's
*beginning* to look like Clarity is going Innovus (for now.)
Mind you, this is a JUST RIGHT NOW reading. I'm old enough to know that a
lot in EDA can change overnight with the right or wrong leadership, or the
right or wrong decisions. RIGHT NOW -- from the user comments -- the Clarity
threat is real, while HFSS hasn't seriously countered with anything yet ...
"First they ignore you. Then they laugh at you. Then they fight
you. Then you win."
- Mahatma Gandhi, Indian lawyer (1869 - 1948)
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QUESTION ASKED:
Q: "What were the 3 or 4 most INTERESTING specific EDA tools
you've seen this year? WHY did they interest you?"
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[ Editor's Note: These are the six Clarity vs. Ansys HFSS
user benchmarks that I spoke of in my opening. - John ]
Cadence Clarity 3D Solver
It has a really fast solving engine.
It can be used to extract high speed interfaces. It uses PCB and
package stack up and material data as inputs, and then generates
S-parameter models.
The most complex block we've run Clarity on is a wafer-level layout-on-
package interposer.
We compared Cadence Clarity with Ansys HFSS:
1. We ran Clarity on up to 24 CPU's -- it was generally 7x faster
than Ansys HFSS.
2. For one CPU, Clarity was about 3-5X faster than HFSS.
3. Clarity has a smaller memory footprint than HFSS; the benefit
is that we can use smaller machines during parallel compute.
4. Clarity could handle complex units that HFSS couldn't.
5. In terms of accuracy, HFSS' and Clarity's S-parameter
results are close from what we saw.
I would recommend giving Clarity a shot -- especially since HFSS has
dominated the 3D extraction field for quite a long time. The
competition should bring faster improvements and innovations in both.
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Cadence's Clarity 3D solver is fast and easy to use. It reads in your
mcm and brd design data, then provides your S-parameters
Our steps to set up Clarity and get our first results were:
1. Set up the tool environment
2. Translate and import the layout data
3. Set up the simulation
4. Run the simulation and output the result
We've compared Clarity with HFSS -- running each tool with 32 CPUs.
- Clarity was 7x faster than HFSS
- Clarity's accuracy was good -- comparable to HFSS
Clarity also has a much smaller memory footprint than HFSS.
- Clarity's memory footprint was only 15 GB
- HFSS's footprint was 116 GB -- nearly 8X bigger
We were able to simulate an HFCBGA package 3D structure with Clarity.
We were not able to do so with HFSS.
Finally, Clarity's 3D model extraction means you should be able to avoid
the risks of manually reducing your structure size -- which could impact
simulation results.
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Clarity is Cadence's 3D full-wave tool for model building.
It took us 2 days to set up our first Clarity simulation flow -- with
the help of Cadence application engineers. The steps are reasonable
and brief for a new user; it is basically software setup and simulation
project setup.
- Our inputs were: our package/PCB design (*.mcm file, *.brd file)
- Clarity produced: S-parameter models, SPICE models, and an E/M
field plot
First, we used Clarity to analyze our package design and PCB design
separately. Then, we merged them together to get accurate results for
sign-off.
Our Cadence Clarity vs Ansys HFSS Benchmark
We compared Clarity and HFSS (our legacy tool) for a package-merged-PCB
case, running the benchmark on 2 parallel Linux servers with 48 CPU
cores are used for benchmark evaluation. Server 1 provided 16 CPU cores
and server 2 provided 32 CPU cores.
Our results were:
1. Performance
Clarity's wall clock runtime was 2X better than HFSS
2. Accuracy
We verified the insertion loss and return loss. The accuracy
difference between Clarity and HFSS was negligible -- no more
than 0.5 dB for the full frequency band.
3. Capacity
The largest block we ran on both tools was an 80 mm x 100 mm PCB,
with 22 layers and 44 excitations.
- Clarity took about 2.5 days.
- HFSS 3D could not solve it.
We've always had accuracy concerns with the "cutting" method
needed by HFSS to improve runtime. Clarity's higher capacity
resolves this.
As for Clarity's frequency sweeping, we checked Clarity's output log
file and found that the number of frequency sweeping points were similar
to HFSS. The distributed computation method based on multiple-cores
really reduced it's total simulation time.
We definitely recommend Clarity -- it's capacity and efficiency are very
compelling.
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Cadence Clarity is a general purpose 3D EM solver. What makes it
interesting is the new tech that increases capacity while decreasing
runtime.
We tested Clarity on a high performance PCB design.
- We ran one huge test case with more than 100 CPU cores.
- Clarity's meshing is highly distributed, so it doesn't need much
memory per core.
Clarity vs. HFSS
- Clarity is massively parallel and scales better than Ansys HFSS.
- I don't have direct performance benchmark comparisons between
Clarity and HFSS, as the most interesting things are those
that we can't run on HFSS due to HFSS' capacity limits.
- We can now put our entire design into Clarity for analysis vs.
breaking it up. When we break it up for HFSS, we have to make
approximations and sacrifice some accuracy. Not with Clarity.
What we've seen so far from Cadence seems pretty convincing.
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We've purchased Anirudh's Clarity 3D solver.
We compared Clarity's performance to Ansys HFSS for 32 cores, and on
the equivalent of 4 CPUs.
- Cadence Clarity had up to a 15X faster turnaround time versus
Ansys HFSS for solving a complex structure IC package (wire-bond
type) combined with a PCB.
- Based on its multi-CPU performance, I believe Clarity would
also run ~4X faster than HFSS for one CPU. However, I have
not directly compared them on one CPU.
Clarity also met our accuracy requirements.
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Cadence Clarity
Clarity 3D solver handles the modeling of our interposer, package and
board system.
We compared it with Ansys HFSS, and Clarity's two biggest advantages are
turnaround time reduction and peak memory cost reduction.
Our initial evaluation took several months. Our first installation was
not difficult, and only took a few hours. But getting the license from
Cadence took one month.
Clarity's inputs can be package design data, such as .mcm, and board
design data, such as .brd. However, the chip design data as .gds cannot
be imported into Clarity; it requires a translation from .gds to .spd.
Clarity outputs S-parameter models for signal integrity, power
integrity, and EMC analysis
We are currently focusing on the silicon-interposer, package and board
level.
To save time, we are currently evaluating Clarity's accuracy and
time/memory cost based on a partial design. So, the largest block we've
run so far is a board for high speed SerDes signal area. We plan to run
the entire design in our next stage.
Anirudh's distributed matrix for adaptive meshing is what makes its 3D
extraction of large and complicate models possible. With it, were able
extract the characteristics for the complicate silicon interposer, which
Ansys HFSS had difficulty with.
Performance and Turnaround Time (TAT)
We could run Clarity with 48 cores, while our reference data extracted
by Ansys HFSS was run with only 16 cores -- so I do not have a direct
performance comparison. Our results were:
- When running with the additional cores, Clarity had 2.5X to 5X
better TAT than HFSS.
- When running on a single CPU, Clarity was 1X-2X faster than Ansys.
Also, we only ran a partial design for the comparison, so we did not see
the same performance gap between the Clarity and HFSS turnaround times
that we might have with a full design.
Accuracy
For our silicon interposer and SerDes board test cases, Clarity's
accuracy was similar to HFSS (which is our golden reference tool).
We did have a discrepancy with Clarity for our package test case, which
we believe came from the different port settings and mode order for
the solvers.
Clarity is currently less accurate than HFSS in the low frequency range.
My understanding is that Clarity's analysis is based on the same finite
element method that HFSS uses.
- The final accuracy depends on how each tool treats the mesh.
- I think the accuracy of Clarity and HFSS are similar if the
number and size of their meshes are close to each other for
the same design.
- Clarity's distributed matrix for the adaptive mesh can
obviously reduce the TAT.
Peak Memory Usage
For the evaluation of our partial design, Clarity's largest peak memory
is less than 20 GB, while the HFSS' peak memory for the same interposer
case was ~175 GB.
Clarity's small memory footprint for multiple machines is its most
important advantage. Clarity's distributed matrix cuts the entire large
matrix for adaptive meshing into diverse small matrices, which is useful
to decrease the peak memory and for time efficiency.
Clarity is a powerful 3D solver for interposer-package-board engineers.
Its most valuable features are its distributed function in adaptive
meshing, plus its ability to significantly reduce TAT and peak memory.
I'd recommended it for engineers who are trapped by large and
complicated designs, such as parameter extraction for large size / high
complication silicon-interposer, package and board level.
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[ Editor's Note: These are the two Clarity vs. Sigrity 3D-EM
user benchmarks that I spoke of earlier. - John ]
Cadence Clarity
Clarity is 3D full-wave electromagnetic tool that we use on our
advanced 2.5D/3D designs, which integrated high-speed parallel
busses and 10's of Giga-Hertz serial link analysis and optimization.
We used to use Cadence Sigrity 3D-EM.
We've used Clarity on our package, PCB, IC, and connector designs. Our
approach is to analyze each component separately during the design stage
and then finalize our sign-off results by merging each component
(package, PCB & IC) database together to get fully accurate results.
Clarity produces S-parameter models and an E/M field plot.
When we first ramped up with Clarity, Cadence's application engineers
helped us out.
- The setup and workflow look quite straightforward, plus it's
simple for new engineers to use.
- Cadence's guidelines are clear on the required steps to
prepare the simulation environment under Linux.
- Clarity's GUI and scripts were quite easy to use -- it only
took several minutes to launch a new simulation.
-Performance benchmark-
We ran Clarity successfully on our entire Si-interposer design, with 128
signal nets and nearby power/ground nets simulated together.
Clarity's simulation capacity is amazing for an IC database design,
which is usually tough for our legacy tool (Cadence Sigrity 3D-EM).
The highest number of CPU cores we used for our benchmark evaluations
was 56. We have two parallel Linux servers, and each provides a maximum
of 28 CPU hard cores.
We saw the following performance improvements for the two Linux servers:
- package case 5X faster than Sigrity 3D-EM
- PCB case ~20X " "
When we merged our package & PCB designs:
- CDNS Sigrity 3D-EM Could not complete simulation after
several days
- Cadence Clarity Completed simulation in 10 hours
We've not yet tested Clarity for one CPU, but based on our experience,
it should also have performance advantages over Sigrity there.
-Accuracy-
Clarity's accuracy was very high when compared with our traditional 3D
FEM golden results from Sigrity 3D-EM.
Further, Clarity does the entire channel & bus model extraction -- with
all the coupled geometry involved -- in just one full-wave simulation.
So, our expectation is that Clarity will give us absolutely accurate
results -- which is especially important for the higher and higher
super-speed designs like 56G/112G SerDes channel evaluation.
In comparison, the traditional method -- cutting and/or simplifying the
whole design manually into small partitions, and then running each
partition in traditional 3D Full-wave solver, to get the final model
-- cannot definitely guarantee what the error or accuracy loss is for
the final model, due to the geometry simplification or reduction.
-Small memory footprint-
We reserved machines with only 32 GB of memory for our Clarity project.
All our cases ran successfully -- we had no physical memory errors.
Because Clarity's distributed computing splits the entire matrix solving
process into dozens of small partitions, each small partition required a
much smaller physical memory.
-Clarity's steps-
Clarity has three stages.
1. Adaptive Meshing.
In our design, our true 3D structures are generally
traditional vias, bonding wires or on-die TSV. It's important
to select the proper mesh generation solver and fine-tuned
maximum size of the tetrahedron object to get the best initial
mesh and converged final mesh.
We've seen Clarity's meshing solver capabilities and expect
Cadence to continue to improve Clarity's meshing engine
stability and robustness to be much smarter to fit into
different modern package/PCB/IC/chassis designs.
2. Frequency sweep
We checked the output log file for each Clarity simulation
regularly, so we've seen that Cadence has improved Clarity's
frequency sweeping method from version to version over in
past several months.
Clarity's frequency sweeping method efficiency is currently
very similar to our legacy tool (Sigrity 3D-EM); but Clarity's
newer *distributed* computation method based on multi-cores
really reduces our total simulation time.
3. Matrix solving
We've not yet tested the maximum capacity of Clarity's matrix
solving stage. (Cadence claims Clarity can handle 100s of
millions to a billion nodes.)
However, our package/PCB co-simulation and Si-interposer
design is really large with millions of nodes in final mesh,
and (so far) we are satisfied with Clarity performance.
We're not yet running huge designs with billions of nodes,
but we are definitely interested in Clarity's performance for
our IC + package + PCB design simulation.
We recommend Clarity. It's a powerful and creative EDA tool. What
impressed us most is its performance.
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Cadence Clarity 3D electromagnetic field simulator
We currently use it primarily for parameter extraction of our chip
package and PCB. It has reduced our simulation time significantly
compared to Cadence Sigrity 3D-EM, which we used previously.
Another thing we like about Clarity it that now we can use economical
computers to do simulations that we could previously only do with
high-performance, expensive computers. This reduces costs.
I spent a few hours configuring Clarity and running it for the first
time. Most of the steps are the same as Sigrity 3D-EM -- the primary
difference for Clarity 3D was configuring the computer resources.
- Clarity's inputs are .brd and .mcm files
- Clarity's outputs are S-parameter models
Our methodology is to first analyze each structure's 3d shape and then
analyze the entire chip.
OVERALL PERFORMANCE
I ran our entire design though Clarity, to extract the S-parameters of
the LPDDR4 on our PCB, with about 44 data buses and 20 command buses.
- Using Sigrity 3D-EM would have taken us 40 hours
- Clarity's runtime with ~24 cores was ~8 hours <-- 5X speedup
ACCURACY
It's difficult to compare the accuracy. However, Clarity is
theoretically more precise because due to our previously longer
simulation times with Sigrity 3D-EM, we typically reduced precision
to accommodate our project schedule.
Because Clarity is so much faster, we no longer need to sacrifice
precision.
MEMORY RESOURCES
Clarity also requires less memory resources than Sigrity 3D-EM, while
requiring a lot of CPU resources for the speedup. So, to keep our costs
down, we use many cheap computers for our calculations.
WARNING: Clarity has many steps -- Adaptive meshing, frequency sweeping,
and matrix solving. As part of this, we found that a lot of temporary
files were generated during the calculation process, which took up a lot
of hard disk space. Cadence says their new version of Clarity has now
improved this, but I have not used it yet.
Overall, Clarity greatly reduces our simulation time while ensuring
accurate analysis. This is very critical for our design.
We can now run complete 3D simulations.
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Against his will, I dragged my head PCB guy to DAC in Vegas just so he
could take a look at Clarity. My Cadence sales guy helped talk him
into coming. (He's an HFSS guy and DAC is not known as a PCB show.)
Afterwards he thanked me. We're now talking with Cadence about doing
an on-site eval of Clarity to see if it actually lives up to its claims.
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Saw Clarity at DAC. Talking to mgmt about it.
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Clarity looks nice, but we're sticking to HFSS. We probably have over
100,000 man-years invested into HFSS. We don't believe in throwing
that away unless there's a seriously compelling reason to.
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We're HFSS.
We most likely won't change over, but like the competition that Clarity
is creating.
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HFSS works perfectly for us. Let sleeping dogs lie.
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Clarity looks interesting.
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John -- if you get any more Clarity benchmarks please publish them.
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